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74ALVCH16543

16-bit D-type registered transceiver; 3-state

The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction.

Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are provided for each register to permit independent control in either direction of the data flow.

The 74ALVCH16543 contains two sections each consisting of two sets of eight D-type latches with separate inputs and controls for each set. For data flow from A to B, for example, the A-to-B enable (nEAB) inputs must be LOW in order to enter data from nA0 to nA7, or take data from nB0 to nB7, as indicated in the function table. With nEAB LOW, a LOW signal on the A-to-B latch enable (nLEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the nLEAB signal stores the A data into the latches. With nEAB and nOEAB both LOW, the 3-state B output buffers are active and display the data present at the output of the A latches. Similarly, the nEBA, nLEBA and nOEBA signals control the data flow from B-to-A.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

特性

  • CMOS low power consumption

  • Direct interface with TTL levels

  • MULTIBYTE flow-through standard pin-out architecture

  • Back-to-back registers for storage

  • Output drive capability 50 Ω transmission lines at 85 °C

  • All data inputs have bus hold

  • Low inductance multiple VCC and GND pins for minimize noise and ground bounce

  • Current drive ±24 mA at 3.0 V

  • 3-state non-inverting outputs for bus oriented applications

  • Complies with JEDEC standards:
    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V

    • CDM JESD22-C101E exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Package name
74ALVCH16543DGGProductionn.a.n.a.TTL± 243.816150low-40~8593TSSOP56

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74ALVCH16543DGG
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_118ActiveALVCH1654374ALVCH16543DGG,11
( 9352 625 44118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74ALVCH16543DGG
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_518Discontinued / End-of-lifeALVCH1654374ALVCH16543DGGY
( 9352 625 44518 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74ALVCH16543DGG935262544518
74ALVCH16543DGG9352625445122021-12-312022-06-3074ALVCH16543DGG
    74ALVCH16543DGG935262544112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16543DGG74ALVCH16543DGG,1174ALVCH16543DGGweek 2, 2006

    下表中的版本已停产。参见表 停产信息 了解更多信息。

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16543DGG74ALVCH16543DGGY74ALVCH16543DGGAlways Pb-free
    品质及可靠性免责声明

    文档 (5)

    文件名称标题类型日期
    74ALVCH1654316-bit D-type registered transceiver; 3-stateData sheet2017-12-15
    alvch16543alvch16543 IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyPackage information2022-06-23

    支持

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    模型

    文件名称标题类型日期
    alvch16543alvch16543 IBIS modelIBIS model2013-04-07

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