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74LVC10A

Triple 3-input NAND gate

The 74LVC10A provides three 3-input NAND functions.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

特性

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Inputs accept voltages up to 5.5 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC10ABQProduction1.2 - 3.6CMOS/LVTTL± 243.91503low-40~12510822.576DHVQFN14
74LVC10ADProduction1.2 - 3.6CMOS/LVTTL± 243.91503low-40~12511021.669SO14
74LVC10APWProduction1.2 - 3.6CMOS/LVTTL± 243.91503low-40~1251438.469TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVC10ABQ
DHVQFN14
(SOT762-1)
SOT762-1SOT762-1_115ActiveVC10A74LVC10ABQ,115
( 9352 735 92115 )
74LVC10AD
SO14
(SOT108-1)
SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_118Active74LVC10AD74LVC10AD,118
( 9352 607 43118 )
74LVC10APW
TSSOP14
(SOT402-1)
SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveLVC10A74LVC10APW,118
( 9352 607 48118 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74LVC10AD9352607431122021-12-312022-06-3074LVC10AD
    74LVC10APW9352607481122021-12-312022-06-3074LVC10APW

      环境信息

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVC10ABQ74LVC10ABQ,11574LVC10ABQAlways Pb-free
      74LVC10AD74LVC10AD,11874LVC10ADweek 5, 2004
      74LVC10APW74LVC10APW,11874LVC10APWweek 10, 2005
      品质及可靠性免责声明

      文档 (13)

      文件名称标题类型日期
      74LVC10ATriple 3-input NAND gateData sheet2024-01-24
      AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
      AN11009Pin FMEA for LVC familyApplication note2019-01-09
      lvc10alvc10a IBIS modelIBIS model2013-04-07
      Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
      lvclvc Spice modelSPICE model2013-05-06
      SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm bodyPackage information2023-04-05
      SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
      SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07
      SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
      SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
      WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
      SOT108-1plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm bodyPackage information2023-11-07

      支持

      如果您需要设计/技术支持,请告知我们并填写 应答表, 我们会尽快回复您。

      模型

      文件名称标题类型日期
      lvc10alvc10a IBIS modelIBIS model2013-04-07
      lvclvc Spice modelSPICE model2013-05-06

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